IC 74192 (4-bit up/down decade counter)
BD 1.300
The 74192 is a Presettable Synchronous 4-Bit Up/Down Decade Counter.
Presetting the counter to the number on the preset data inputs (Input A - Input D) is accomplished by a LOW asynchronous parallel load input (Load). The counter is incremented on the low-to-high transition of the UP input (and a high level on the Clock- DOWN) and decremented on the low to high transition of the DOWN input (and a high level on the UP input). A high level on the CLR input overrides any other input to clear the counter to its zero state. The Terminal Count up (CO) goes low half a clock period before the zero count is reached and returns to a high level at the zero count.
The Terminal Count Down (BO) in the count down mode likewise goes low half a clock period before the maximum count (9 in the 74192) and returns to high at the maximum count. Cascading is effected by connecting the CO [carry] and BO [borrow] outputs of a less significant counter to the Clock-Up [UP] and Clock-Down [DOWN] inputs, respectively, of the next most significant counter.
Presetting the counter to the number on the preset data inputs (Input A - Input D) is accomplished by a LOW asynchronous parallel load input (Load). The counter is incremented on the low-to-high transition of the UP input (and a high level on the Clock- DOWN) and decremented on the low to high transition of the DOWN input (and a high level on the UP input). A high level on the CLR input overrides any other input to clear the counter to its zero state. The Terminal Count up (CO) goes low half a clock period before the zero count is reached and returns to a high level at the zero count.
The Terminal Count Down (BO) in the count down mode likewise goes low half a clock period before the maximum count (9 in the 74192) and returns to high at the maximum count. Cascading is effected by connecting the CO [carry] and BO [borrow] outputs of a less significant counter to the Clock-Up [UP] and Clock-Down [DOWN] inputs, respectively, of the next most significant counter.
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Product Details
HIGH SPEED
fMAX = 54 MHz (TYP.) AT VCC =5V
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) AT TA = 25 °C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
|IOH|=IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
. PIN AND FUNCTION COMPATIBLE WITH
54/74LS192-193